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Motors: Compact Control (October 2006)
by Eric R. Motto
October 1, 2006

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<b>Fig. 1.</b> DIP-IPM functional diagram.
Fig. 1. DIP-IPM functional diagram.
Low-cost power modules shrink appliance inverter designs.


The transfer molded DIP-IPM (Dual-in-Line Intelligent Power Module) was first introduced by Mitsubishi Electric in 1998 to address the growing demand for cost-effective motor control in consumer-appliance applications. Today, these devices are widely accepted because of performance, reliability and cost advantages. Recently, improvements in package thermal performance, power-chip design, and high-voltage integrated circuits have expanded the usable range of this technology to motors rated from about 100 W to more than 10 KW at line voltages of 100 VAC to 480 VAC.


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<b>Fig. 2.</b> DIP-IPM cross-section.
Fig. 2. DIP-IPM cross-section.
The DIP-IPM is less expensive to produce than conventional hybrid modules because it does not require an IMS or ceramic substrate and plastic shell housing like conventional integrated modules. The transfer molding process is also well-suited for high-volume, automated mass production, thus substantially reducing cost. The DIP-IPM provides the low cost of a discrete component design while maintaining the advantages of an intelligent power module. Compared to a discrete approach, these devices offer high reliability, small size, and reduced manufacturing costs by integrating optimally matched power devices and high voltage integrated circuit (HVIC) drivers in a single module.

Fig. 1 presents a basic block diagram of the DIP-IPM integrated features, which include the power devices and custom control ICs for gate drive and protection. The key to the DIP-IPM is the integration of HVICs to provide level shifting and gate drive for the high side IGBTs. With a few external components, the entire 3-phase power stage can operate from a single 15-V control power supply. The DIP-IPM also utilizes a custom low-voltage integrated circuit to provide gate drive, overcurrent protection and undervoltage lockout for the low-side IGBTs.

Incorporating the level shifting into the DIP-IPM reduces high-voltage spacing requirements on the control PCB, significantly reducing required circuit-board space. The factory verified coordination of ICs and power chips ensures reliability. All of these features are combined in a compact, low-cost, transfer-molded package that allows miniaturization of inverter designs.


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<b>Fig. 3.</b> Generation 4 DIP-IPM interface circuit.
Fig. 3. Generation 4 DIP-IPM interface circuit.
Fig. 2 shows the cross section of a typical DIP-IPM. All DIP-IPMs are fabricated using a transfer molding process like a large integrated circuit. First, bare power chips and the custom HVIC and LVIC die are assembled on a lead frame. Ultrasonic bonding of large-diameter aluminum wires makes electrical connections between the power chips and lead frame. Small diameter gold wires are bonded to make the signal level connections between the IC die and lead frame. Finally, the lead-frame assembly is encapsulated in sturdy epoxy using a transfer molding process.

The DIP-IPM contains HVIC and low voltage integrated circuit (LVIC) chips to provide gate drive and protection for the power devices. The integrated features include:


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<b>Table 1.</b> DIP line-up.
Table 1. DIP line-up.
High-voltage level shift. The main feature of the DIP-IPMs is the high-voltage level shifting provided by the integrated HVIC. The built-in level shift eliminates the need for opto-couplers or pulse transformers and allows direct connection of all six control inputs to the CPU/DSP.

Undervoltage lockout. The DIP-IPM is protected from failure of the 15-V control power supply by a built in undervoltage lock-out circuit. If the voltage of the control supply falls below the UV level specified on the data sheet, the low side IGBTs are turned off and a fault signal is asserted. In addition, the p-side HVIC gate drive circuits have independent undervoltage lock-out circuits that turn off the IGBT to protect against failure if the voltage of the floating power supply becomes too low. If the high-side undervoltage lockout protection is activated, the respective IGBT will be turned off, but a fault signal is not supplied.


<b>Fig. 4a.</b> DIP-IPM package outlines.
Fig. 4a. DIP-IPM package outlines.
Short-circuit protection. The DIP-IPMs have an integrated, short-circuit protection function. The LVIC monitors the voltage across an external shunt resistor (RSHUNT) to detect excessive current in the DC link. An RC filter (RSF, CSF) with a time constant of 1.5 µs to 2 µs is normally inserted as shown in Fig. 1 to prevent erroneous fault detection because of dI/dt induced noise on the shunt resistor and free-wheel diode recovery currents. When the voltage at the CIN pin exceeds the VSC reference level specified on the device data sheet, the lower arm IGBTs are turned off and a fault signal is asserted at the FO output. When an overcurrent condition is detected, the IGBTs remain off until the fault time (tFO) has expired and the input signal has cycled to its off state. The duration of tFO is set by an external timing capacitor CFO.


<b>Fig. 4b.</b> DIP-IPM package outlines.
Fig. 4b. DIP-IPM package outlines.
Over-temperature protection. The generation 4 DIP-IPM is available with optional over-temperature protection. A temperature sensor is fabricated on the LVIC chip. If the temperature of the LVIC, which is essentially the same as the device’s case temperature, exceeds the specified over-temperature trip point, the three lower IGBTs will be turned off and a fault signal will be asserted. The fault condition automatically clears after the device has cooled below the over-temperature reset level. Approximately 10 DegC of hysteresis is included to prevent oscillations of the over-temperature protection.

Interface circuit. The DIP-IPM has seven microprocessor-compatible input and output signals. The built-in HVIC level shifters allow all signals to be referenced to the common ground of the 15-V control power supply. The signals are compatible with 3.3-V to 15-V TTL/CMOS logic to permit direct connection to a PWM controller. Fig. 3 shows the equivalent internal circuit of the DIP-IPM control signals and a simplified schematic of a typical external interface circuit.


<b>Fig. 4c.</b> DIP-IPM package outlines.
Fig. 4c. DIP-IPM package outlines.
Shown in dashed blue lines are noise-filtering components, which can be optional or may be required depending on the circuit layout and its proximity to noise sources. On-and-off operations for all six of the DIP-IPM IGBTs are controlled by the active high-control inputs UP, VP, WP, UN, VN, WN. These inputs are pulled low internally by a 3.3 kOhm resistor. The controller commands the respective IGBT to turn on by pulling the input high. Approximately 1.8 V of hysteresis is provided on all control inputs to help prevent oscillations and enhance noise immunity.

The fault signal output (FO) is in an open-collector configuration. Normally, the fault signal line is pulled high to the 5 V logic supply with a 10 kOhm resistor as shown in Fig. 3. When an over-current, over-temperature condition or improper control power supply voltage is detected, the DIP-IPM turns on the internal open-collector device and pulls the fault line low.


DIP-IPM line-up

<b>Fig. 4d.</b> DIP-IPM package outlines.
Fig. 4d. DIP-IPM package outlines.
Four different transfer molded packages have been developed to cover a large power range cost effectively. The DIP-IPM line-up is shown in Table 1. Modules are available with blocking voltages of 600 V and 1,200 V. These modules are designed for 100 VAC to 480 VAC applications. The table also shows the usable sinusoidal RMS motor current per phase for some typical application conditions. These values are calculated using the loss simulation software available from the Powerex website www.pwrx.com. The table also lists some of the available options that include several different lead forms, over-temperature protection, and open low-side emitter configurations. The open-emitter configuration allows the use of separate shunt resistors in each of the three legs.


For more information email: kbandieramonte@pwrx.com


Eric R. Motto
Eric R. Motto is principal application engineer, Powerex, Youngwood Pa.

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